Multiple wavelength groupings utilize a single on-chip photonic core, allowing concurrent convolution operations while avoiding duplication of the entire physical computing network.
A silicon photonic design that is compact moves convolution scaling away from spatial duplication toward interleaving in the wavelength domain
CHINA, August 3, 2026 /EINPresswire.com/ — A spatiotemporal photonic interleaving network called SPIN, intended for scalable photonic convolution, has been introduced by researchers at Shanghai Jiao Tong University. Through recursive sharing of optical delay lines among wavelength channels, the waveguide-length scaling is reduced from O(K²) to O(K log₂ K) and the number of active control elements becomes O(K). Optical–digital correlations exceeding 0.98 were observed in experiments using MNIST digits, and analysis projects a performance of 29.7 TOPS from a single populated spectral core. The architecture also supports programmable kernel shapes and task parallelism using wavelength multiplexing.
Modern tasks in artificial intelligence and image processing call for hardware capable of performing convolution with high throughput, a small footprint, and reasonable energy use. Although conventional electronic accelerators keep advancing, large-scale convolution and matrix operations are becoming more limited by data movement, interconnect overhead, and chip-area scaling than by arithmetic units themselves.
Integrated photonics provides a complementary path because light can simultaneously transmit many signals via wavelength, time, and space. Photonic processors are especially appealing for linear operations like convolution and matrix–vector multiplication, which are fundamental to machine vision and neural networks. However, current photonic architectures have their own compromises. Mach-Zehnder interferometer meshes offer programmability but suffer from poor scaling in footprint and control complexity. Microring resonators are small but are vulnerable to temperature and fabrication variations. Diffractive or metasurface methods can achieve high density, yet they are often hard to reconfigure after fabrication.
Professor Yikai Su’s research group at Shanghai Jiao Tong University tackles the density–programmability challenge with a spatiotemporal photonic interleaving network, known as SPIN. Rather than boosting throughput primarily by replicating spatial optical paths, SPIN shifts the scaling load into the wavelength dimension. This yields a compact and programmable photonic convolution framework for high-density optical computing. The research appeared in the journal Opto-Electronic Science on July 23, 2026.
SPIN is constructed around a recursive tree of cascaded optical interleavers. A serialized input waveform is distributed to multiple wavelength carriers, with each wavelength directed through a specific sequence of shared delay segments. These delays generate the time-aligned sliding window required for convolution. Kernel weights are then applied optically, the weighted signals are summed incoherently, and the signed convolution result is retrieved electronically following baseline subtraction.
This topology alters the scaling behavior of convolution on chip. In a conventional independent-delay design, bigger kernels necessitate many separate delay paths, leading to quadratic growth in total waveguide length with the number of operands. SPIN positions longer delay segments upstream in the interleaver tree, where they are shared by multiple downstream wavelength channels. The authors demonstrate that this lowers waveguide-length complexity to O(K log₂ K), while the count of actively controlled weighting elements increases only as O(K).
A proof-of-concept SPIN chip was fabricated by the team on a commercial 220 nm silicon-on-insulator platform. The prototype employs a three-stage cascaded interleaver network for eight wavelength channels. At 49 Gbaud, the chip executed representative 2 × 2 convolution operations on MNIST handwritten digits. The measured optical waveforms matched the digital ground truth closely, with correlation coefficients exceeding 0.98, and the reconstructed feature maps distinctly emphasized digit outlines.
The authors also showed wavelength-domain scalability beyond single-task convolution. Sixteen optical carriers were split into wavelength groups, allowing multiple image batches and convolution tasks to share the same physical SPIN core. The paper additionally demonstrates structural reconfigurability by implementing a 2 ×
